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NCV4276B 400 mA Low-Drop Voltage Regulator
The NCV4276B is a 400 mA output current integrated low dropout regulator family designed for use in harsh automotive environments. It includes wide operating temperature and input voltage ranges. The device is offered with adjustable voltage versions available in 2% output voltage accuracy. It has a high peak input voltage tolerance and reverse input voltage protection. It also provides overcurrent protection, overtemperature protection and inhibit for control of the state of the output voltage. The NCV4276B is available in DPAK surface mount package. The output is stable over a wide output capacitance and ESR range. The NCV4276B has improved startup behavior during input voltage transients.
Features http://onsemi.com MARKING DIAGRAM
DPAK 5-PIN DT SUFFIX CASE 175AA 1 A L Y WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Device
76BAJG ALYWW
1
5
* Adjustable Voltage Version (from 2.5 V to 20 V) 2% Output * * * * *
* *
Voltage 400 mA Output Current 500 mV (max) Dropout Voltage (5.0 V Output) Inhibit Input Very Low Current Consumption Fault Protection +45 V Peak Transient Voltage -42 V Reverse Voltage Short Circuit Thermal Overload NCV Prefix for Automotive and Other Applications Requiring Site and Change Controls These are Pb-Free Devices
I Error Amplifier - + Current Limit and Saturation Sense Q
*Tab is connected to Pin 3.
ORDERING INFORMATION
See detailed ordering and shipping information in the ordering information section on page 11 of this data sheet.
Bandgap Reference Thermal Shutdown
INH
GND
VA
Figure 1. Block Diagram
(c) Semiconductor Components Industries, LLC, 2010
June, 2010 - Rev. 0
1
Publication Order Number: NCV4276B/D
NCV4276B
PIN FUNCTION DESCRIPTION
Pin No. 1 2 3 4 5 Symbol I INH GND VA Q Input; Battery Supply Input Voltage. Inhibit; Set low-to inhibit. Ground; Pin 3 internally connected to heatsink. Voltage Adjust Input; use an external voltage divider to set the output voltage Output: Bypass with a capacitor to GND. See Figures NO TAG to 3 and Regulator Stability Considerations section. Description
MAXIMUM RATINGS*
Rating Input Voltage Input Peak Transient Voltage Inhibit INH Voltage Voltage Adjust Input VA Output Voltage Ground Current Input Voltage Operating Range ESD Susceptibility Junction Temperature Storage Temperature (Human Body Model) (Machine Model) Symbol VI VI VINH VVA VQ Iq VI - - TJ Tstg Min -42 - -42 -0.3 -1.0 - VQ + 0.5 V or 4.5 V (Note 1) 4.0 250 -40 -50 Max 45 45 45 10 40 100 40 - - 150 150 Unit V V V V V mA V kV V C C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. *During the voltage range which exceeds the maximum tested voltage of I, operation is assured, but not specified. Wider limits may apply. Thermal dissipation must be observed closely.
LEAD TEMPERATURE SOLDERING REFLOW (Note 2)
Lead Temperature Soldering Reflow (SMD styles only), Leaded, 60-150 s above 183, 30 s max at peak Reflow (SMD styles only), Lead Free, 60-150 s above 217, 40 s max at peak Wave Solder (through hole styles only), 12 sec max TSLD - - - 240 265 310 C
THERMAL CHARACTERISTICS
Characteristic Junction-to-Tab (psi-JLx, yJLx) Junction-to-Ambient (RqJA, qJA) 1. 2. 3. 4. 4.2 100.9 Test Conditions (Typical Value) Min Pad Board (Note 3) 1, Pad Board (Note 4) 4.7 46.8 C/W C/W Unit
Minimum VI = 4.5 V or (VQ + 0.5 V), whichever is higher. Per IPC / JEDEC J-STD-020C. 1 oz. copper, 0.26 inch2 (168 mm2) copper area, 0.062 thick FR4. 1 oz. copper, 1.14 inch2 (736 mm2) copper area, 0.062 thick FR4.
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NCV4276B
ELECTRICAL CHARACTERISTICS (VI = 13.5 V; -40C < TJ < 150C; unless otherwise noted.)
Characteristic OUTPUT Output Voltage AVQ 5.0 mA < IQ < 400 mA VQ+1 < VI < 40 V VI > 4.5 V VQ = 90% VQTYP (VQTYP = 2.5 V) VINH = 0 V IQ = 1.0 mA IQ = 250 mA IQ = 400 mA IQ = 250 mA, VDR = VI - VQ, VI > 4.5 V IQ = 5.0 mA to 400 mA DVI = 12 V to 32 V, IQ = 5.0 mA fr = 100 Hz, Vr = 0.5 VPP - VQ w VQMIN VQ v 0.1 V VINH = 5.0 V IQ = 5.0 mA -2% - +2% V Symbol Test Conditions Min Typ Max Unit
Output Current Limitation Quiescent Current (Sleep Mode) Iq = II - IQ Quiescent Current, Iq = II - IQ Quiescent Current, Iq = II - IQ Quiescent Current, Iq = II - IQ Dropout Voltage Load Regulation Line Regulation Power Supply Ripple Rejection Temperature Output Voltage Drift INHIBIT Inhibit Voltage, Output High Inhibit Voltage, Output Low (Off) Input Current THERMAL SHUTDOWN Thermal Shutdown Temperature*
IQ Iq Iq Iq Iq VDR DVQ,LO DVQ PSRR dVQ/dT VINH VINH IINH TSD
400 - - - - - - - - - - 1.8 5.0 150
700 - 130 10 25 250 3.0 4.0 70 0.5 2.3 2.2 10 -
1100 10 200 15 35 500 20 15 - - 2.8 - 20 210
mA mA mA mA mA mV mV mV dB mV/K V V mA
C
*Guaranteed by design, not tested in production. VQ = [(R1 + R2) * Vref] / R2 Input II CI1 1.0 mF CI2 100 nF INH IINH 2 I1 5Q IQ CQ 22 mF 4 GND VA R2 Cb* Output
NCV4276B 3
R1 RL
Cb* - Required if usage of low ESR output capacitor CQ is demand, see Regulator Stability Considerations section
Figure 2. Applications Circuit
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NCV4276B
TYPICAL PERFORMANCE CHARACTERISTICS
100 Unstable Region 10 ESR (W) 12 V CQ = 22 mF for these Output Voltages
1
Stable Region
2.5 V
6V
0.1 Unstable Region 0.01 Cb capacitor not connected 0 50 100 150 200 250 300 OUTPUT CURRENT (mA) 350 400
Figure 3. Output Stability with Output Capacitor ESR
2.55 Iq, CURRENT CONSUMPTION (mA) VQ, OUTPUT VOLTAGE (V) 2.54 2.53 2.52 2.51 2.50 2.49 2.48 2.47 2.46 2.45 -40 0 40 80 120 160 VI = 13.5 V, RL = 1 kW
5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 10 20 30 VI, INPUT VOLTAGE (V)
TJ = 25C RL = 20 W
40
50
TJ, JUNCTION TEMPERATURE (C)
Figure 4. Output Voltage vs. Junction Temperature
4 VQ, OUTPUT VOLTAGE (V) II, INPUT CURRENT (mA) 3.5 3 2.5 2 1.5 1 0.5 0 0 2 4 6 VI, INPUT VOLTAGE (V) 8 10 TJ = 25C RL = 20 W 2 0 -2 -4 -6 -8 -10 -12 -14
Figure 5. Current Consumption vs. Input Voltage
-16 -18 -50
TJ = 25C RL = 6.8 kW -25 0 VI, INPUT VOLTAGE (V) 25 50
Figure 6. Low Voltage Behavior
Figure 7. High Voltage Behavior
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NCV4276B
TYPICAL PERFORMANCE CHARACTERISTICS
600 VDR, DROPOUT VOLTAGE (mV) IQ, OUTPUT CURRENT (mA) 500 400 300 200 100 0 0 50 100 150 200 250 300 IQ, OUTPUT CURRENT (mA) 350 400 TJ = 125C 800 700 600 500 400 300 200 100 0 0 10 20 30 VI, INPUT VOLTAGE (V) 40 50 TJ = 25C VQ = 0 V
TJ = 25C
Figure 8. Dropout Voltage vs. Output Current, Regulator Set at 5.0 V
60 Iq, CURRENT CONSUMPTION (mA) 50 40 30 20 10 0 0 100 200 300 400 500 600 TJ = 25C VI = 13.5 V Iq, CURRENT CONSUMPTION (mA) 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 0
Figure 9. Maximum Output Current vs. Input Voltage
TJ = 25C VI = 13.5 V
10
20
30
40
50
60
IQ, OUTPUT CURRENT (mA)
IQ, OUTPUT CURRENT (mA)
Figure 10. Current Consumption vs. Output Current (High Load)
Figure 11. Current Consumption vs. Output Current (Low Load)
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NCV4276B
Circuit Description The NCV4276B is an integrated low dropout regulator that provides a regulated voltage at 400 mA to the output. It is enabled with an input to the inhibit pin. The regulator voltage is provided by a PNP pass transistor controlled by an error amplifier with a bandgap reference, which gives it the lowest possible dropout voltage. The output current capability is 400 mA, and the base drive quiescent current is controlled to prevent oversaturation when the input voltage is low or when the output is overloaded. The regulator is protected by both current limit and thermal shutdown. Thermal shutdown occurs above 150C to protect the IC during overloads and extreme ambient temperatures. Regulator The error amplifier compares the reference voltage to a sample of the output voltage (VQ) and drives the base of a PNP series pass transistor via a buffer. The reference is a bandgap design to give it a temperature-stable output. Saturation control of the PNP is a function of the load current and input voltage. Oversaturation of the output power device is prevented, and quiescent current in the ground pin is minimized. See Figure 2, Test Circuit, for circuit element nomenclature illustration. Regulator Stability Considerations The input capacitors (CI1 and CI2) are necessary to stabilize the input impedance to avoid voltage line influences. Using a resistor of approximately 1.0 W in series with CI2 can stop potential oscillations caused by stray inductance and capacitance. The output capacitor helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (-25C to -40C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturer's data sheet usually provides this information. The value for the output capacitor CQ, shown in Figure 2, should work for most applications; see also Figure 3 for output stability at various load and Output Capacitor ESR conditions. Stable region of ESR in Figure 3 shows ESR values at which the LDO output voltage does not have any permanent oscillations at any dynamic changes of output load current. Marginal ESR is the value at which the output voltage waving is fully damped during four periods after the load change and no oscillation is further observable. ESR characteristics were measured with ceramic capacitors and additional series resistors to emulate ESR. Low duty cycle pulse load current technique has been used to maintain junction temperature close to ambient temperature. Calculating Bypass Capacitor If usage of low ESR ceramic capacitors is demanded, connect the bypass capacitor Cb between Voltage Adjust pin and Q pin according to Applications circuit at Figure 4. Parallel combination of bypass capacitor Cb with the feedback resistor R1 contributes in the device transfer function as an additional zero and affects the device loop stability, therefore its value must be optimized. Attention to the Output Capacitor value and its ESR must be paid. See also Stability in High Speed Linear LDO Regulators Application Note, AND8037/D for more information. Optimal value of bypass capacitor is given by following expression
Cb + 2 p 1 fz R1 @ (F)
where R1 = the upper feedback resistor fz = the frequency of the zero added into the device transfer function by R1 and Cb external components. Set the R1 resistor according to output voltage requirement. Chose the fz with regard on the output capacitance CQ, refer to the table below.
CQ (mF) fz Range (kHz) 10 20 - 50 22 14 - 35 47 10 - 20 100 7 - 14
Ceramic capacitors and its part numbers listed bellow have been used as low ESR output capacitors CQ from the table above to define the frequency ranges of additional zero required for stability. GRM31CR71C106KAC7 (10 mF, 16 V, X7R, 1206) GRM32ER71C226KE18 (22 mF, 16 V, X7R, 1210) GRM32ER61C476ME15 (47 mF, 16 V, X5R, 1210) GRM32ER60J107ME20 (100 mF, 6.3 V, X5R, 1210) Inhibit Input The inhibit pin is used to turn the regulator on or off. By holding the pin down to a voltage less than 1.8 V, the output of the regulator will be turned off. When the voltage on the Inhibit pin is greater than 2.8 V, the output of the regulator will be enabled to power its output to the regulated output voltage. The inhibit pin may be connected directly to the input pin to give constant enable to the output regulator.
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NCV4276B
Setting the Output Voltage The output voltage range can be set between 2.5 V and 20 V. This is accomplished with an external resistor divider feeding back the voltage to the IC back to the error amplifier by the voltage adjust pin VA. The internal reference voltage is set to a temperature stable reference of 2.5 V. The output voltage is calculated from the following formula. Ignoring the bias current into the VA pin:
VQ + [(R1 ) R2) * Vref] R2
Use R2 < 50 k to avoid significant voltage output errors due to VA bias current. Connecting VA directly to Q without R1 and R2 creates an output voltage of 2.5 V. Designers should consider the tolerance of R1 and R2 during the design phase. The input voltage range for operation (pin 1) of the adjustable version is between (VQ + 0.5 V) and 40 V. Internal bias requirements dictate a minimum input voltage of 4.5 V. The dropout voltage for output voltages less than 4.0 V is (4.5 V - VQ).
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NCV4276B
Calculating Power Dissipation in a Single Output Linear Regulator The maximum power dissipation for a single output regulator (Figure 12) is:
PD(max) + [VI(max) * VQ(min)] IQ(max) ) VI(max)Iq
(1)
where is the maximum input voltage, is the minimum output voltage, is the maximum output current for the application, Iq is the quiescent current the regulator consumes at IQ(max). Once the value of PD(max) is known, the maximum permissible value of RqJA can be calculated:
o T RqJA + 150 C * A PD
(2)
Heatsinks A heatsink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RqJA:
RqJA + RqJC ) RqCS ) RqSA
(3)
VI(max) VQ(min) IQ(max)
where RqJC is the junction-to-case thermal resistance, RqCS is the case-to-heatsink thermal resistance, RqSA is the heatsink-to-ambient thermal resistance. RqJC appears in the package section of the data sheet. Like RqJA, it too is a function of package type. RqCS and RqSA are functions of the package type, heatsink and the interface between them. These values appear in data sheets of heatsink manufacturers. Thermal, mounting, and heatsinking considerations are discussed in the ON Semiconductor application note AN1040/D.
The value of RqJA can then be compared with those in the package section of the data sheet. Those packages with RqJA less than the calculated value in Equation 2 will keep the die temperature below 150C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required.
II VI SMART REGULATOR(R) IQ VQ
} Control Features
Iq
Figure 12. Single Output Regulator with Key Performance Parameters Labeled
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NCV4276B
Thermal Model A discussion of thermal modeling is in the ON Semiconductor web site: http://www.onsemi.com/pub/collateral/BR1487-D.PDF.
Table 1. DPAK 5-Lead Thermal RC Network Models
Drain Copper Area (1 oz thick) (SPICE Deck Format) 168 C_C1 C_C2 C_C3 C_C4 C_C5 C_C6 C_C7 C_C8 C_C9 C_C10 Junction node1 node2 node3 node4 node5 node6 node7 node8 node9 GND GND GND GND GND GND GND GND GND GND 168 mm2 736 mm2 168 mm2 736 mm2 Cauer Network mm2 736 mm2 Units W-s/C W-s/C W-s/C W-s/C W-s/C W-s/C W-s/C W-s/C W-s/C W-s/C R's C/W C/W C/W C/W C/W C/W C/W C/W C/W C/W 0.0123 0.0585 0.0304 0.3997 3.115 3.571 12.851 35.471 46.741 R's 0.0123 0.0585 0.0287 0.3772 2.68 1.38 5.92 7.39 28.94 C/W C/W C/W C/W C/W C/W C/W C/W C/W C/W Tau 1.36E-08 7.41E-07 1.04E-05 3.91E-05 1.80E-03 3.77E-01 3.79E+00 2.65E+01 8.71E+01 Foster Network Tau 1.361E-08 7.411E-07 1.029E-05 3.737E-05 1.376E-03 2.851E-02 9.475E-01 1.173E+01 8.59E+01 Units sec sec sec sec sec sec sec sec sec sec
1.00E-06 1.00E-05 6.00E-05 1.00E-04 4.36E-04 6.77E-02 1.51E-01 4.80E-01 3.740 10.322 168 mm2
1.00E-06 1.00E-05 6.00E-05 1.00E-04 3.64E-04 1.92E-02 1.27E-01 1.018 2.955 0.438 736 mm2
R_R1 R_R2 R_R3 R_R4 R_R5 R_R6 R_R7 R_R8 R_R9 R_R10 NOTE:
Junction node1 node2 node3 node4 node5 node6 node7 node8 node9
node1 node2 node3 node4 node5 node6 node7 node8 node9 GND
0.015 0.08 0.4 0.2 2.97519 8.2971 25.9805 46.5192 17.7808 0.1
0.015 0.08 0.4 0.2 2.6171 1.6778 7.4246 14.9320 19.2560 0.1758
Bold face items represent the package without the external thermal system. Junction R1 R2 R3 Rn
C1
C2
C3
Cn Ambient (thermal ground)
Time constants are not simple RC products. Amplitudes of mathematical solution are not the resistance values.
Figure 13. Grounded Capacitor Thermal Network ("Cauer" Ladder)
Junction R1 R2 R3 Rn
C1
C2
C3
Cn
Each rung is exactly characterized by its RC-product time constant; amplitudes are the resistances.
Ambient (thermal ground)
Figure 14. Non-Grounded Capacitor Thermal Ladder ("Foster" Ladder) http://onsemi.com
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NCV4276B
110 100 90 qJA (C/W) 80 70 60 50 40 30 150 200 250 300 350 400 450 500 550 600 650 700 750 COPPER AREA (mm2) 2 oz 1 oz
Figure 15. qJA vs. Copper Spreader Area
100 Cu Area 167 mm2 10 R(t) C/W Cu Area 736 mm2
1.0 sqrt(t) 0.1
0.01 0.0000001
0.000001
0.00001
0.0001
0.001
0.01 TIME (sec)
0.1
1.0
10
100
1000
Figure 16. Single-Pulse Heating Curves
100 50% Duty Cycle RqJA 736 mm2 C/W 10 20% 10% 5% 2% 1%
1.0
0.1 Non-normalized Response 0.01 0.0000001 0.000001 0.00001 0.0001 0.001 0.01 0.1 1.0 10 100 1000
PULSE WIDTH (sec)
Figure 17. Duty Cycle for 1, Spreader Boards
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NCV4276B
ORDERING INFORMATION
Device NCV4276BDTADJRKG Output Voltage Accuracy 2% Output Voltage Adjustable Package DPAK, 5-Pin (Pb-Free) Shipping 2500 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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NCV4276B
PACKAGE DIMENSIONS
DPAK 5, CENTER LEAD CROP DT SUFFIX CASE 175AA-01 ISSUE A
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.020 0.028 0.018 0.023 0.024 0.032 0.180 BSC 0.034 0.040 0.018 0.023 0.102 0.114 0.045 BSC 0.170 0.190 0.185 0.210 0.025 0.040 0.020 --- 0.035 0.050 0.155 0.170 MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.51 0.71 0.46 0.58 0.61 0.81 4.56 BSC 0.87 1.01 0.46 0.58 2.60 2.89 1.14 BSC 4.32 4.83 4.70 5.33 0.63 1.01 0.51 --- 0.89 1.27 3.93 4.32
-T- B V R C E
SEATING PLANE
R1 Z U
S
A
1234 5
K F L D G
5 PL
J H 0.13 (0.005) T
DIM A B C D E F G H J K L R R1 S U V Z
M
SOLDERING FOOTPRINT*
6.4 0.252 2.2 0.086
5.8 0.228
0.34 5.36 0.013 0.217
10.6 0.417
0.8 0.031
SCALE 4:1
mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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NCV4276B/D

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